Google announces official Android support for RISC-V


Google announces official Android support for RISC-V

Over the holiday season, images from the recent “RISC-V Summit” were posted for the world to see, and would you believe Google showed up to profess its love for the emerging CPU architecture?

We’ve been trying to establish how the Android team feels about RISC-V for a while now. We last heard a comment from the team six months ago, where our Google I/O question about RISC-V was only answered with “we’re looking, but it would be a big change for us.” A few third-party RISC-V porting projects exist, and several RISC-V commits have ended up in the Android Open Source Project (AOSP), but since anyone can submit code to AOSP, it’s been hard to make bold statements about RISC- V’s Android status.

Google’s keynote at the RISC-V summit, however, was all about bold proclamations. Lars Bergstrom, Android’s technical director, wants RISC-V to be seen as a “tier-1 platform” in Android, which would put it on par with Arm. That’s a big change from just six months ago. Bergstrom says getting optimized Android builds on RISC-V will take “a lot of work” and outlined a roadmap that will take “a few years” to come to fruition, but AOSP started landing official RISC-V in September. V patches.

The build system is up and running and anyone can grab the latest “riscv64” branch whenever they want – and yes, in line with the recent Arm work, Google wants RISC-V on Android to be 64-bit only. For now, the most you can get is a command line, and Bergstrom’s slide promised “first emulator support by early 2023, with Android RunTime (ART) support for Java workloads to follow during Q1.”

RISC-V on Android is going to be a long journey.
Enlarge / RISC-V on Android is going to be a long journey.

One of Bergstrom’s slides included the “to-do” list above, which covered a lot of important Android components. In contrast to Android’s raw support for x86, Bergstrom promised a real push for quality with RISC-V, saying: “We need to do all the work to go from prototype and something that spins to something that really sings – that’s show off the best-in-class processors that [RISC-V International Chairman Krste Asanović] was mentioned in the previous talk.”

Once Google installs Android on RISC-V, it’s up to the manufacturers and app ecosystem to support the platform. The nice thing about the Android RunTime is that when ART supports RISC-V, a large part of the Android app ecosystem joins it. Android apps are delivered as Java code and the way an ARM app becomes is when the Android Runtime compiles it into ARM code. Instead, it will soon be compiled into RISC-V code with no additional work from the developer. Native code not written in Java, such as games and component libraries, must be ported, but starting with Java code is a great jump start.

Arm has become an unstable, volatile business partner

In her opening remarks, Calista Redmond, CEO of RISC-V International (the non-profit company that owns the architecture), argued that “RISC-V is inevitable” thanks to its open business model and wave of open chip design it can create, and it is becoming more and more difficult to argue with that. While the show was mostly about the benefits of RISC-V, let me add that the main reason why RISC-V seems inevitable is that current CPU frontrunner Arm has become an unstable, volatile business, and it feels like any viable alternative would. now have a good chance of success.

Just look at Arm’s behavior in recent years. After a few bad bets in 2020, we saw Arm’s owner, Softbank, slap a “for sale” sign on the world’s largest mobile chip company and start holding sales meetings. For a while, it seemed that Nvidia – a company notorious for being difficult to work with – would become the new owner of Arm, bundle the chip designs with GPUs and find a new business partner with some of its most hated rivals . Regulators around the world eventually closed that deal, and now Softbank wants Arm to get an IPO, which may or may not happen depending on how the economy goes.